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I agree that it's conceptually nice to support non-power of two word sizes, but how often do those come up these days in practice? If none of the architectures they're targeting actually have such a word size, it seems like it might be a useful simplifying assumption.


I would agree in full, those oddball machines don't come up very often. But when they do, its really nice to have something that makes as few assumptions about the underlying hardware as possible. If I recall correctly C89 doesn't make any requirements about size (except that sizeof(char) is always 1).

It is rare that libraries get rewritten from the ground up, so this would be the perfect time to get the code right.


Can you name a single widely used modern processor architecture that uses odd word sizes?

Microcontrollers are fair game.

I can't think of one.


AVR-targeted gcc has an __int24 type. Not a power of two.


AVRs have 8 bit words.




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