Nominally hypercube architecture is 'n' dimensional[1], which relates to the number of channels at each vertex. Assuming you took the front and back plane of this thing and connected them together it would qualify as having 6 dimensions (6 channels per vertex). The first such system I had a chance to play with was the Intel one[2] which was order 6 using Intels iAPX432 processors.
Oh, I see. If your cube is exactly 4x4x4, and you loop it in each dimension, then it's topologically equivalent to an order-6 hypercube with a node on each vertex.
In the general case, you need log2(N) connections in each direction to turn an NxN or NxNxN topology into a hypercube, so it's not as simple as "left/right". (For example, for N=8, you might connect each position to position xor 1, position xor 2, and position xor 4.)
[1] The (original?) Oak Ridge National Labs paper -- https://www.osti.gov/biblio/6487986-parallel-computing-hyper...
[2] https://www.nature.com/articles/313616b0.pdf?proof=trueIn